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lt1815/lt1816/lt1817 1 181567fb typical application features description single/dual/quad 220mhz, 1500v/? operational ampli ers with programmable supply current the lt ? 1815/lt1816/lt1817 are low power, high speed, very high slew rate operational ampli? ers with excellent dc performance. the lt1815/lt1816/lt1817 feature higher bandwidth and slew rate, much lower input offset voltage and lower noise and distortion than other devices with comparable supply current. a programmable current option (lt1815 and lt1816a) allows power savings and ? exibility by operating at reduced supply current and speed. the circuit topology is a voltage feedback ampli? er with the slewing characteristics of a current feedback ampli? er. the output drives a 100 load to 3.8v with 5v supplies. on a single 5v supply, the output swings from 1v to 4v with a 100 load connected to 2.5v. harmonic distortion is C70db for a 5mhz, 2v p-p output driving a 100 load in a gain of C1. the lt1815/lt1816/lt1817 are manufactured on linear technologys advanced low voltage complementary bipolar process and are available in a variety of tsot-23, so, msop , ssop and leadless dfn packages. programmable current ampli? er switches from low power mode to full speed mode applications n 220mhz gain-bandwidth product n 1500v/s slew rate n 6.5ma supply current per ampli? er n programmable current option n 6nv/ hz input noise voltage n unity-gain stable n 1.5mv maximum input offset voltage n 8a maximum input bias current n 800na maximum input offset current n 50ma minimum output current, v out = 3v n 3.5v minimum input cmr, v s = 5v n speci? ed at 5v, single 5v supplies n operating temperature range: C40c to 85c n space saving msop and ssop packages n low pro? le (1mm) sot-23 (thinsot?) and leadless dfn packages n wideband ampli? ers n buffers n active filters n video and rf ampli? cation n communication receivers n cable drivers n data acquisition systems l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. distortion vs frequency C + lt1815 40k 100 v out 181567 ta01 C5v i set 500 hs/ lp v in 500 5v frequency (hz) C100 C70 C80 C90 C30 C40 C50 C60 181567 ta02 distortion (db) 100k 10m 1m 3rd harmonic 2nd harmonic low power mode 2nd harmonic 3rd harmonic full speed mode a v = 2 v s = 5v v o = 2v p-p r l = 100
lt1815/lt1816/lt1817 2 181567fb absolute maximum ratings total supply voltage (v + to v C ) ............................. 12.6v differential input voltage (transient only, note 2) ........................................... 6v input voltage ........................................................... v s output short-circuit duration (note 3) .......... inde? nite operating temperature range .................C40c to 85c (note 1) out 1 v C 2 top view s5 package 5-lead plastic tsot-23 +in3 5 v + 4 Cin + C t jmax = 150c, ja = 250c/w (note 9) 1 2 3 6 5 4 top view s6 package 6-lead plastic tsot-23 v + i set Cin out v C +in + C t jmax = 150c, ja = 230c/w (note 9) 1 2 3 4 8 7 6 5 top view nc v + out nc nc Cin +in v C s8 package 8-lead plastic so + C t jmax = 150c, ja = 150c/w (note 9) top view dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 9 4 3 2 1 out a Cin a +in a v C v + out b Cin b +in b a b t jmax = 125c, ja = 160c/w (note 9) underside metal internally connected to v C 1 2 3 4 outa Cina +ina v C 8 7 6 5 v + outb Cinb +inb top view ms8 package 8-lead plastic msop a b t jmax = 150c, ja = 250c/w (note 9) 1 2 3 4 5 out a Cin a +in a v C v C 10 9 8 7 6 v + out b Cin b +in b i set top view ms package 10-lead plastic msop a b t jmax = 150c, ja = 250c/w (note 9) 1 2 3 4 8 7 6 5 top view v + out b Cin b +in b out a Cin a +in a v C s8 package 8-lead plastic so a b t jmax = 150c, ja = 150c/w (note 9) gn package 16-lead plastic ssop narrow 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 out a Cin a +in a v + +in b Cin b out b nc out d Cin d +in d v C +in c Cin c out c nc + C + C + C + C a b d c t jmax = 150c, ja = 135c/w top view s package 14-lead plastic so 1 2 3 4 5 6 7 14 13 12 11 10 8 8 out a Cin a +in a v + +in b Cin b out b out d Cin d +in d v C +in c Cin c out c + C + + + C C C ad bc t jmax = 150c, ja = 100c/w pin configuration lt1815 lt1815 lt1815 speci? ed temperature range (note 8) ....C40c to 85c maximum junction temperature ......................... 150c (dd package) .................................................... 125c storage temperature range .................. C65c to 150c (dd package) ..................................... C65c to 125c lead temperature (soldering, 10 sec)................... 300c lt1816 lt1816 lt1816 lt1816 lt1817 lt1817
lt1815/lt1816/lt1817 3 181567fb electrical characteristics symbol parameter conditions min typ max units v os input offset voltage (note 4) t a = 0c to 70c t a = C40c to 85c l l 0.2 1.5 2.0 3.0 mv mv mv input offset voltage (low power mode) (note 10) lt1815s6/lt1816a, 40k between i set and v C t a = 0c to 70c t a = C40c to 85c l l 27 9 10 mv mv mv v os t input offset voltage drift t a = 0c to 70c (note 7) t a = C40c to 85c (note 7) l l 10 10 15 30 v/c v/c i os input offset current t a = 0c to 70c t a = C40c to 85c l l 60 800 1000 1200 na na na i b input bias current t a = 0c to 70c t a = C40c to 85c l l C2 8 10 12 a a a the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c (note 8). v s = 5v, v cm = 0v, unless otherwise noted. for the programmable current option (lt1815s6 or lt1816a), the i set pin must be connected to v C through 75 or less, unless otherwise noted. order information lead free finish tape and reel part marking* package description specified temperature range lt1815cs5#pbf lt1815cs5#trpbf ltup 5-lead plastic tsot-23 0c to 70c lt1815is5#pbf lt1815is5#trpbf ltvc 5-lead plastic tsot-23 C40c to 85c lt1815cs6#pbf lt1815cs6#trpbf ltul 6-lead plastic tsot-23 0c to 70c lt1815is6#pbf lt1815is6#trpbf ltvd 6-lead plastic tsot-23 C40c to 85c lt1815cs8#pbf lt1815cs8#trpbf 1815 8-lead plastic so 0c to 70c lt1815is8#pbf lt1815is8#trpbf 1815i 8-lead plastic so C40c to 85c lt1816cdd#pbf lt1816cdd#trpbf laar 8-lead (3mm 3mm) plastic dfn 0c to 70c lt1816idd#pbf lt1816idd#trpbf laar 8-lead (3mm 3mm) plastic dfn C40c to 150c lt1816cms8#pbf lt1816cms8#trpbf ltwa 8-lead plastic msop 0c to 70c lt1816ims8#pbf lt1816ims8#trpbf ltnq 8-lead plastic msop C40c to 85c lt1816acms#pbf lt1816acms#trpbf ltya 10-lead plastic msop 0c to 70c lt1816aims#pbf lt1816aims#trpbf ltxx 10-lead plastic msop C40c to 85c lt1816cs8#pbf lt1816cs8#trpbf 1816 8-lead plastic so 0c to 70c lt1816is8#pbf lt1816is8#trpbf 1816i 8-lead plastic so C40c to 85c lt1817cgn#pbf lt1817cgn#trpbf 1817 16-lead plastic ssop 0c to 70c lt1817ign#pbf lt1817ign#trpbf 1817i 16-lead plastic ssop C40c to 85c lt1817cs#pbf lt1817cs#trpbf lt1817cs 14-lead plastic so 0c to 70c lt1817is#pbf lt1817is#trpbf lt1817is 14-lead plastic so C40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
lt1815/lt1816/lt1817 4 181567fb symbol parameter conditions min typ max units e n input noise voltage density f = 10khz 6 nv/ hz i n input noise current density f = 10khz 1.3 pa/ hz r in input resistance v cm = 3.5v differential 1.5 5 750 m k c in input capacitance 2pf v cm input voltage range guaranteed by cmrr t a = C40c to 85c l 3.5 3.5 4.2 v v cmrr common mode rejection ratio v cm = 3.5v t a = 0c to 70c t a = C40c to 85c l l 75 73 72 85 db db db minimum supply voltage guaranteed by psrr t a = C40c to 85c l 1.25 2 2 v v psrr power supply rejection ratio v s = 2v to 5.5v t a = 0c to 70c t a = C40c to 85c l l 78 76 75 97 db db db channel separation v out = 3v, r l = 100, lt1816/lt1817 t a = 0c to 70c t a = C40c to 85c l l 82 81 80 100 db db db a vol large-signal voltage gain v out = 3v, r l = 500 t a = 0c to 70c t a = C40c to 85c l l 1.5 1.0 0.8 3 v/mv v/mv v/mv v out = 3v, r l = 100 t a = 0c to 70c t a = C40c to 85c l l 0.7 0.5 0.4 2.5 v/mv v/mv v/mv v out maximum output swing r l = 500, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 3.8 3.7 3.6 4.1 v v v r l = 100, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 3.50 3.25 3.15 3.8 v v v i out maximum output current v out = 3v, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 50 45 40 80 ma ma ma maximum output current (low power mode) (note 10) lt1815s6/lt1816a; 40k between i set and v C ; v out = 3v, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 50 40 30 75 ma ma ma i sc output short-circuit current v out = 0v, 1v overdrive (note 3) t a = 0c to 70c t a = C40c to 85c l l 100 90 70 200 ma ma ma sr slew rate a v = C1 (note 5) t a = 0c to 70c t a = C40c to 85c l l 900 750 600 1500 v/s v/s v/s fpbw full-power bandwidth 6v p-p (note 6) 80 mhz electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c (note 8). v s = 5v, v cm = 0v, unless otherwise noted. for the programmable current option (lt1815s6 or lt1816a), the i set pin must be connected to v C through 75 or less, unless otherwise noted.
lt1815/lt1816/lt1817 5 181567fb symbol parameter conditions min typ max units gbw gain-bandwidth product f = 200khz, r l = 500, lt1815 t a = 0c to 70c t a = C40c to 85c l l 150 140 130 220 mhz mhz mhz f = 200khz, r l = 500, lt1816/lt1817 t a = 0c to 70c t a = C40c to 85c l l 140 130 120 220 mhz mhz mhz gain-bandwidth product (low power mode) (note 10) lt1815s6/lt1816a; 40k between i set and v C ; f = 200khz, r l = 500 t a = 0c to 70c t a = C40c to 85c l l 35 30 25 55 mhz mhz mhz C3db bw C3db bandwidth a v = 1, r l = 500 350 mhz t r , t f rise time, fall time a v = 1, 10% to 90%, 0.1v, r l = 100 1 ns t pd propagation delay a v = 1, 50% to 50%, 0.1v, r l = 100 1.4 ns os overshoot a v = 1, 0.1v; r l = 100 25 % t s settling time a v = C1, 0.1%, 5v 15 ns thd total harmonic distortion a v = 2, f = 5mhz, v out = 2v p-p , r l = 500 C70 db dg differential gain a v = 2, v out = 2v p-p , r l = 150 0.08 % dp differential phase a v = 2, v out = 2v p-p , r l = 150 0.04 deg r out output resistance a v = 1, f = 1mhz 0.20 i s supply current lt1815 t a = 0c to 70c t a = C40c to 85c l l 6.5 7 9 10 ma ma ma lt1816/lt1817, per ampli? er t a = 0c to 70c t a = C40c to 85c l l 6.5 7.8 10.5 11.5 ma ma ma supply current (low power mode) (note 10) lt1815s6/lt1816a, 40k between i set and v C , per ampli? er t a = 0c to 70c t a = C40c to 85c l l 1 1.5 1.8 2.0 ma ma ma i set i set pin current (note 10) lt1815s6/lt1816a t a = 0c to 70c t a = C40c to 85c l l C150 C175 C200 C100 a a a electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c (note 8). v s = 5v, v cm = 0v, unless otherwise noted. for the programmable current option (lt1815s6 or lt1816a), the i set pin must be connected to v C through 75 or less, unless otherwise noted.
lt1815/lt1816/lt1817 6 181567fb electrical characteristics the l denotes the speci? cations which apply over the full operating temp- erature range, otherwise speci? cations are at t a = 25c (note 8). v s = 5v, ov; v cm = 2.5v, r l to 2.5v, unless otherwise noted. for the programmable current option (lt1815s6 or lt1816a), the i set pin must be connected to v C through 75 or less, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage (note 4) t a = 0c to 70c t a = C40c to 85c l l 0.4 2.0 2.5 3.5 mv mv mv input offset voltage (low power mode) (note 10) lt1815s6/lt1816a, 40k between i set and v C t a = 0c to 70c t a = C40c to 85c l l 27 9 10 mv mv mv v os t input offset voltage drift t a = 0c to 70c (note 7) t a = C40c to 85c (note 7) l l 10 10 15 30 v/c v/c i os input offset current t a = 0c to 70c t a = C40c to 85c l l 60 800 1000 1200 na na na i b input bias current t a = 0c to 70c t a = C40c to 85c l l C2.4 8 10 12 a a a e n input noise voltage density f = 10khz 6 nv/ hz i n input noise current density f = 10khz 1.3 pa/ hz r in input resistance v cm = 1.5v to 3.5v differential 1.5 5 750 m k c in input capacitance 2pf v cm input voltage range (high) guaranteed by cmrr t a = C40c to 85c l 3.5 3.5 4.1 v v input voltage range (low) guaranteed by cmrr t a = C40c to 85c l 0.9 1.5 1.5 v v cmrr common mode rejection ratio v cm = 1.5v to 3.5v t a = 0c to 70c t a = C40c to 85c l l 73 71 70 82 db db db channel separation v out = 1.5v to 3.5v, r l = 100, lt1816/lt1817 t a = 0c to 70c t a = C40c to 85c l l 81 80 79 100 db db db minimum supply voltage guaranteed by psrr t a = C40c to 85c l 2.5 4 4 v v a vol large-signal voltage gain v out = 1.5v to 3.5v, r l = 500 t a = 0c to 70c t a = C40c to 85c l l 1.0 0.7 0.6 2 v/mv v/mv v/mv v out = 1.5v to 3.5v, r l = 100 t a = 0c to 70c t a = C40c to 85c l l 0.7 0.5 0.4 1.5 v/mv v/mv v/mv v out maximum output swing (high) r l = 500, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 3.9 3.8 3.7 4.2 v v v r l = 100, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 3.7 3.6 3.5 4v v v v out maximum output swing (low) r l = 500, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 0.8 1.1 1.2 1.3 v v v r l = 100, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 1 1.3 1.4 1.5 v v v
lt1815/lt1816/lt1817 7 181567fb symbol parameter conditions min typ max units i out maximum output current v out = 1.5v or 3.5v, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 30 25 20 50 ma ma ma maximum output current (low power mode) (note 10) lt1815s6/lt1816a; 40k between i set and v C ; v out = 1.5v or 3.5v, 30mv overdrive t a = 0c to 70c t a = C40c to 85c l l 30 25 20 50 ma ma ma i sc output short-circuit current v out = 2.5v, 1v overdrive (note 3) t a = 0c to 70c t a = C40c to 85c l l 80 70 50 140 ma ma ma sr slew rate a v = C1 (note 5) t a = 0c to 70c t a = C40c to 85c l l 450 375 300 750 v/s v/s v/s fpbw full-power bandwidth 2v p-p (note 6) 120 mhz gbw gain-bandwidth product f = 200khz, r l = 500, lt1815 t a = 0c to 70c t a = C40c to 85c l l 140 130 120 200 mhz mhz mhz f = 200khz, r l = 500, lt1816/lt1817 t a = 0c to 70c t a = C40c to 85c l l 130 110 100 200 mhz mhz mhz gain-bandwidth product (low power mode) (note 10) lt1815s6/lt1816a; 40k between i set and v C ; f = 200khz, r l = 500 t a = 0c to 70c t a = C40c to 85c l l 30 25 20 50 mhz mhz mhz C3db bw C3db bandwidth a v = 1, r l = 500 300 mhz t r , t f rise time, fall time a v = 1, 10% to 90%, 0.1v, r l = 100 1.2 ns t pd propagation delay a v = 1, 50% to 50%, 0.1v, r l = 100 1.5 ns os overshoot a v = 1, 0.1v; r l = 100 25 % t s settling time a v = C1, 0.1%, 2v 15 ns thd total harmonic distortion a v = 2, f = 5mhz, v out = 2v p-p , r l = 500 C65 db dg differential gain a v = 2, v out = 2v p-p , r l = 150 0.08 % dp differential phase a v = 2, v out = 2v p-p , r l = 150 0.13 deg r out output resistance a v = 1, f = 1mhz 0.24 i s supply current lt1815 t a = 0c to 70c t a = C40c to 85c l l 6.3 8 10 11 ma ma ma lt1816/lt1817, per ampli? er t a = 0c to 70c t a = C40c to 85c l l 6.3 9 12 13 ma ma ma supply current (low power mode) (note 10) lt1815s6/lt1816a, 40k between i set and v C , per ampli? er t a = 0c to 70c t a = C40c to 85c l l 0.9 1.5 1.8 2.0 ma ma ma i set i set pin current (note 10) lt1815s6/lt1816a t a = 0c to 70c t a = C40c to 85c l l C150 C175 C200 C100 a a a electrical characteristics the l denotes the speci? cations which apply over the full operating temp- erature range, otherwise speci? cations are at t a = 25c (note 8). v s = 5v, ov; v cm = 2.5v, r l to 2.5v, unless otherwise noted. for the programmable current option (lt1815s6 or lt1816a), the i set pin must be connected to v C through 75 or less, unless otherwise noted. note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: differential inputs of 6v are appropriate for transient operation only, such as during slewing. large sustained differential inputs can cause excessive power dissipation and may damage the part.
lt1815/lt1816/lt1817 8 181567fb note 3: a heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted inde? nitely. note 4: input offset voltage is pulse tested and is exclusive of warm-up drift. note 5: slew rate is measured between 2v at the output with 3v input for 5v supplies and 2v p-p at the output with a 3v p-p input for single 5v supplies. note 6: full-power bandwidth is calculated from the slew rate: fpbw = sr/2v p note 7: this parameter is not 100% tested. note 8: the lt1815c/lt1816c/lt1817c are guaranteed to meet speci? ed performance from 0c to 70c and are designed, characterized and expected to meet the extended temperature limits, but are not tested at C40c and 85c. the lt1815i/lt1816i/lt1817i are guaranteed to meet the extended temperature limits. note 9: thermal resistance ( ja ) varies with the amount of pc board metal connected to the package. the speci? ed values are for short traces connected to the leads. if desired, the thermal resistance can be substantially reduced by connecting pin 2 of the tsot-23, pin 4 of the so-8 and ms8, pin 5 of the ms10 or the underside metal of the dd package to a large metal area. note 10: a resistor of 40k or less is required between the i set and v C pins of the lt1815s6 and the lt1816ams. see the applications information section for information on selecting a suitable resistor. electrical characteristics supply current vs temperature input common mode range vs supply voltage input bias current vs common mode voltage input bias current vs temperature input noise spectral density open-loop gain vs resistive load typical performance characteristics temperature (c) C50 C25 0 supply current (ma) 4 12 10 0 50 75 181567 g01 2 8 6 25 100 125 v s = 5v v s = 2.5v per amplifier supply voltage (v) 0 v C input common mode range (v) 1.0 1.5 2.0 v + C2.0 C1.5 2 4 5 181567 g02 0.5 C1.0 C0.5 1 3 6 7 t a = 25c v os < 1mv input common mode voltage (v) C5.0 input bias current (a) C2 C1 t a = 25c v s = 5v 5.0 181567 g03 C3 C4 C2.5 0 2.5 0 temperature (c) C50 C1.2 C0.8 0 25 75 181567 g0 4 C1.6 C2.0 C25 0 50 100 125 C2.4 C2.8 C0.4 input bias current (a) v s = 5v v s = 2.5v frequency (hz) 10 100 1 10 i n 100 0.1 1 10 1k 10k 100k 181567 g05 t a = 25c v s = 5v a v = 101 r s = 10k e n input voltage noise (nv/ ? hz) input current noise (pa/ ? hz) load resistance () 100 60.0 open-loop gain (db) 62.5 65.0 67.5 70.0 75.0 1k 10k 181567 g0 6 72.5 t a = 25c v s = 5v v s = 2.5v
lt1815/lt1816/lt1817 9 181567fb typical performance characteristics output short-circuit current vs temperature output current vs temperature output impedance vs frequency gain and phase vs frequency gain bandwidth and phase margin vs temperature gain vs frequency, a v = 1 open-loop gain vs temperature output voltage swing vs supply voltage output voltage swing vs load current temperature (c) C50 open-loop gain (db) 70.0 72.5 75.0 25 75 181567 g07 67.5 65.0 C25 0 50 100 125 62.5 60.0 v s = 5v v o = 3v r l = 500 r l = 100 supply voltage (v) 0 v C output voltage swing (v) 1.0 1.5 2.0 v + C2.0 C1.5 2 4 5 181567 g08 0.5 C1.0 C0.5 1 3 6 7 t a = 25c v os = 30mv r l = 100 r l = 100 r l = 500 r l = 500 output current (ma) C120 output voltage swing (v) output voltage swing (v) C2 40 181567 g09 C3 C4 C5 5 4 3 2 C80 C40 0 80 120 t a = 25c v s = 5v v os = 30mv sink source temperature (c) C50 output short-circuit current (ma) 160 200 240 25 75 181567 g10 120 80 C25 0 50 100 125 40 0 source sink v s = 5v v in = 1v temperature (c) C50 outupt current (ma) 100 125 150 25 75 181567 g11 75 50 C25 0 50 100 125 25 0 v os = 30mv v out = 3v for v s = 5v v out = 1v for v s = 2.5v source, v s = 5v sink, v s = 5v source, v s = 2.5v sink, v s = 2.5v frequency (hz) 0.01 output impedance () 0.1 100 1m 100k 10k 10m 100m 181567 g12 1 10 a v = 100 a v = 10 a v = 1 t a = 25c v s = 5v frequency (hz) 10k 20 gain (db) phase (deg) 30 40 50 60 100k 1m 500m 100m 10m 181567 g13 10 0 C10 C20 70 80 60 80 100 120 140 40 20 0 C20 160 180 t a = 25c a v = C1 r f = r g = 500 2.5v 2.5v 5v 5v gain phase temperature (c) C50 C25 gain bandwidth (mhz) phase margin (deg) 180 240 0 50 75 181567 g14 36 40 38 220 200 25 100 125 gbw v s = 5v gbw v s = 2.5v phase margin v s = 2.5v phase margin v s = 5v r l = 500 frequency (hz) 1m gain (db) C5 0 10m 100m 500m 181567 g15 C10 5 t a = 25c a v = 1 v s = 5v r l = 500 r l = 100
lt1815/lt1816/lt1817 10 181567fb typical performance characteristics power supply rejection ratio vs frequency common mode rejection ratio vs frequency supply current vs programming resistor gain bandwidth product vs programming resistor slew rate vs input step slew rate vs supply voltage gain vs frequency, a v = 2 gain vs frequency, a v = C1 gain bandwidth and phase margin vs supply voltage frequency (hz) 1m gain (db) 10m 100m 300m 181567 g16 5 0 C5 C10 10 t a = 25c a v = 2 v s = 5v r f = r g = 500 c f = 1pf r l = 500 r l = 100 frequency (hz) 1m gain (db) C5 0 10m 100m 300m 181567 g17 C10 5 t a = 25c a v = C1 v s = 5v r f = r g = 500 c f = 1pf r l = 500 r l = 100 supply voltage (v) 0 gain bandwidth (mhz) phase margin (deg) 3 181567 g18 160 45 40 35 12 4 240 200 220 180 567 t a = 25c gbw r l = 500 gbw r l = 100 phase margin r l = 100 phase margin r l = 500 frequency (hz) 1k 10k 100k 40 power supply rejection ratio (db) 60 80 1m 10m 100m 181567 g19 20 0 100 Cpsrr +psrr t a = 25c a v = 1 v s = 5v frequency (hz) 1k 10k 100k 40 common mode rejection ratio (db) 60 80 1m 10m 100m 181567 g20 20 0 100 t a = 25c v s = 5v r set programming resistor () 2 supply current (ma) 4 6 7 10 1k 10k 40k 181567 g21 0 100 5 3 1 v s = 5v t a = 25c per amplifier r set programing resistor () 50 gain bandwidth (mhz) 100 150 200 250 10 1k 10k 40k 181567 g22 0 100 v s = 5v t a = 25c r l = 500 r l = 100 input step (v p-p ) 0 300 slew rate (v/s) 900 1800 2 4 5 181567 g23 600 1500 1200 1 3 6 78 t a =25c a v = C1 v s = 5v r f = r g = r l = 500 sr C sr + supply voltage (v) 0 400 slew rate (v/s) 600 2 4 5 181567 g24 800 1000 1200 1 3 6 7 t a =25c a v = C1 v in = 2v p-p r f = r g = r l = 500 sr + sr C
lt1815/lt1816/lt1817 11 181567fb 181567 g30 typical performance characteristics distortion vs frequency, a v = C1 distortion vs frequency, a v = 1 small-signal transient, a v = C1 small-signal transient, a v = 1 large-signal transient, a v = C1, v s = 5v large-signal transient, a v = 1, v s = 5v slew rate vs temperature differential gain and phase vs supply voltage distortion vs frequency, a v = 2 temperature (c) C50 slew rate (v/s) 1600 2000 2400 25 75 181567 g25 1200 800 C25 0 50 100 125 400 0 sr + v s = 5v sr C v s = 5v sr + v s = 2.5v sr C v s = 2.5v a v = C1 r f = r g = r l = 500 (note 5) total supply voltage (v) 4 0 differential phase (deg) differential gain (%) 0.02 0.06 0.08 0.10 6 8 181567 g26 0.04 0.12 0 0.02 0.06 0.08 0.10 0.04 t a = 25c 10 12 differential gain r l = 150 differential phase r l = 150 frequency (hz) C100 C70 C80 C90 C30 C40 C50 C60 181567 g27 distortion (db) 100k 10m 1m 2nd harmonic 3rd harmonic a v = 2 v s = 5v v o = 2v p-p r l = 100 frequency (hz) C100 C70 C80 C90 C30 C40 C50 C60 181567 g28 distortion (db) 100k 10m 1m 2nd harmonic 3rd harmonic a v = C1 v s = 5v v o = 2v p-p r l = 100 frequency (hz) C100 C70 C80 C90 C30 C40 C50 C60 181567 g2 9 distortion (db) 100k 10m 1m 2nd harmonic 3rd harmonic a v = 1 v s = 5v v o = 2v p-p r l = 100 181567 g33 181567 g32 181567 g31
lt1815/lt1816/lt1817 12 181567fb layout and passive components as with all high speed ampli? ers, the lt1815/lt1816/ lt1817 require some attention to board layout. a ground plane is recommended and trace lengths should be mini- mized, especially on the negative input lead. low esl/esr bypass capacitors should be placed directly at the positive and negative supply (0.01f ceramics are recommended). for high drive current applications, ad- ditional 1f to 10f tantalums should be added. the parallel combination of the feedback resistor and gain setting resistor on the inverting input combine with the input capacitance to form a pole that can cause peaking or even oscillations. if feedback resistors greater than 1k are used, a parallel capacitor of value: c f > r g ? c in /r f should be used to cancel the input pole and optimize dy- namic performance. for applications where the dc noise gain is 1 and a large feedback resistor is used, c f should be greater than or equal to c in . an example would be an i-to-v converter. input considerations the inputs of the lt1815/lt1816/lt1817 ampli? ers are connected to the base of an npn and pnp bipolar transis- tor in parallel. the base currents are of opposite polarity and provide ? rst-order bias current cancellation. due to variation in the matching of npn and pnp beta, the polar- ity of the input bias current can be positive or negative. the offset current, however, does not depend on beta matching and is tightly controlled. therefore, the use of balanced source resistance at each input is recommended for applications where dc accuracy must be maximized. for example, with a 100 source resistance at each input, the 800na maximum offset current results in only 80v of extra offset, while without balance the 8a maximum input bias current could result in a 0.8mv offset contribution. the inputs can withstand differential input voltages of up to 6v without damage and without needing clamping or series resistance for protection. this differential input voltage generates a large internal current (up to 80ma), which results in the high slew rate. in normal transient applications information closed-loop operation, this does not increase power dis- sipation signi? cantly because of the low duty cycle of the transient inputs. sustained differential inputs, however, will result in excessive power dissipation and therefore this device should not be used as a comparator. capacitive loading the lt1815/lt1816/lt1817 are optimized for high band- width and low distortion applications. they can drive a capacitive load of 10pf in a unity-gain con? guration and more with higher gain. when driving a larger capacitive load, a resistor of 10 to 50 should be connected be- tween the output and the capacitive load to avoid ringing or oscillation. the feedback should still be taken from the output so that the resistor will isolate the capacitive load to ensure stability. slew rate the slew rate of the lt1815/lt1816/lt1817 is propor- tional to the differential input voltage. therefore, highest slew rates are seen in the lowest gain con? gurations. for example, a 5v output step in a gain of 10 has a 0.5v input step, whereas in unity gain there is a 5v input step. the lt1815/lt1816/lt1817 are tested for a slew rate in a gain of C1. lower slew rates occur in higher gain con? gurations. programmable supply current (lt1815/lt1816a) in order to operate the lt1815s6 or lt1816a at full speed (and full supply current), connect the i set pin to the nega- tive supply through a resistance of 75 or less. to adjust or program the supply current and speed of the lt1815s6 or lt1816a, connect an external resistor (r set ) between the i set pin and the negative supply, as shown in figure 1. the ampli? ers are fully functional with 0 r set 40k. figures 2 and 3 show how the gain bandwidth and supply current vary with the value of the programming resistor r set. in addition, the electrical characteristics sec- tion of the data sheet speci? es maximum supply current and offset voltage, as well as minimum gain bandwidth and output current at the maximum r set value of 40k.
lt1815/lt1816/lt1817 13 181567fb applications information power dissipation the lt1815/lt1816/lt1817 combine high speed and large output drive in small packages. it is possible to exceed the maximum junction temperature speci? cation (150c) under certain conditions. maximum junction temperature (t j ) is calculated from the ambient temperature (t a ), power dissipation per ampli? er (p d ) and number of ampli? ers (n) as follows: t j = t a + (n ? p d ? ja ) power dissipation is composed of two parts. the ? rst is due to the quiescent supply current and the second is due to on-chip dissipation caused by the load current. the worst-case load induced power occurs when the output voltage is at one-half of either supply voltage (or the maximum swing if less than one-half the supply voltage). therefore, p dmax is: p dmax = (v + C v C ) ? (i smax ) + (v + /2) 2 /r l or p dmax = (v + C v C ) ? (i smax ) + (v + C v omax ) ? (v omax /r l ) example: lt1816is8 at 85c, v s = 5v, r l =100 p dmax = (10v) ? (11.5ma) + (2.5v) 2 /100 = 178mw t jmax = 85c + (2 ? 178mw) ? (150c/w) = 138c circuit operation the lt1815/lt1816/lt1817 circuit topology is a true volt- age feedback ampli? er that has the slewing behavior of a current feedback ampli? er. the operation of the circuit can be understood by referring to the simpli? ed schematic. complementary npn and pnp emitter followers buffer the inputs and drive an internal resistor. the input volt- age appears across the resistor, generating current that is mirrored into the high impedance node. complementary followers form an output stage that buf- fers the gain node from the load. the input resistor, input stage transconductance and the capacitor on the high impedance node determine the bandwidth. the slew rate is determined by the current available to charge the gain node capacitance. this current is the differential input voltage divided by r1, so the slew rate is proportional to the input step. highest slew rates are therefore seen in the lowest gain con? gurations. figure 1. programming resistor between i set and v C figure 2. gain bandwidth product vs r set programming resistor figure 3. supply current vs r set programming resistor i set v C 181567 f01 v + r set C5v 5v C + lt1815s6 r set programing resistor () 50 gain bandwidth (mhz) 100 150 200 250 10 1k 10k 40k 181567 f02 0 100 v s = p 5v t a = 25c r l = 500 r l = 100 r set programming resistor () 2 supply current (ma) 4 6 7 10 1k 10k 40k 181567 f03 0 100 5 3 1 v s = 5v t a = 25c per amplifier
lt1815/lt1816/lt1817 14 181567fb two op amp instrumentation ampli? er 181567 ta03 v in trim r5 for gain trim r1 for common mode rejection bw = 2mhz r1 10k r2 1k r5 220 r4 10k r3 1k v out + C C + C + 1/2 lt1816 1/2 lt1816 gain r r r r r r rr r a ? ? 1 ? ? | ? | ? a ? ? ? 1 ? ? ? 4 3 1 1 2 2 1 3 4 23 5 102 simplified schematic 181567 ss out +in Cin bias control v + v C lt1815s6/lt1816ams only i set r1 c (one ampli? er) typical applications
lt1815/lt1816/lt1817 15 181567fb typical applications photodiode transimpedance ampli? er 4mhz, 4th order butterworth filter C + lt1815 4.75k 1pf 1pf C5v photodiode siemens/ infineon sfh213 C5v 181567 ta04 5v 0.01f output offset 1mv typical bandwidth = 30mhz 10% to 90% rise time = 22ns output noise (20mhz bw) = 300v p-p 4.75k C + 1/2 lt1816 220pf v in 665 232 47pf 232 C + 1/2 lt1816 470pf 181567 ta05 v out 562 274 22pf 274
lt1815/lt1816/lt1817 16 181567fb package description s5 package 5-lead plastic tsot-23 (reference ltc dwg # 05-08-1635) s6 package 6-lead plastic tsot-23 (reference ltc dwg # 05-08-1636) 1.50 C 1.75 (note 4) 2.80 bsc 0.30 C 0.45 typ 5 plcs (note 3) datum a 0.09 C 0.20 (note 3) s5 tsot-23 0302 rev b pin one 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 C 0.90 1.00 max 0.01 C 0.10 0.20 bsc 0.30 C 0.50 ref note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref 1.50 C 1.75 (note 4) 2.80 bsc 0.30 C 0.45 6 plcs (note 3) datum a 0.09 C 0.20 (note 3) s6 tsot-23 0302 rev b 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 C 0.90 1.00 max 0.01 C 0.10 0.20 bsc 0.30 C 0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref
lt1815/lt1816/lt1817 17 181567fb package description dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698 rev c) s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) .016 ?.050 (0.406 ?1.270) .010 ?.020 (0.254 ?0.508) 45 0 ?8 typ .008 ?.010 (0.203 ?0.254) so8 0303 .053 ?.069 (1.346 ?1.752) .014 ?.019 (0.355 ?0.483) typ .004 ?.010 (0.101 ?0.254) .050 (1.270) bsc 1 2 3 4 .150 ?.157 (3.810 ?3.988) note 3 8 7 6 5 .189 ?.197 (4.801 ?5.004) note 3 .228 ?.244 (5.791 ?6.197) .245 min .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) 3.00 p 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.40 p 0.10 bottom viewexposed pad 1.65 p 0.10 (2 sides) 0.75 p 0.05 r = 0.125 typ 2.38 p 0.10 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 C 0.05 (dd8) dfn 0509 rev c 0.25 p 0.05 2.38 p 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 p 0.05 (2 sides) 2.10 p 0.05 0.50 bsc 0.70 p 0.05 3.5 p 0.05 package outline 0.25 p 0.05 0.50 bsc
lt1815/lt1816/lt1817 18 181567fb package description ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660 rev f) ms package 10-lead plastic msop (reference ltc dwg # 05-08-1661 rev e) msop (ms8) 0307 rev f 0.53 p 0.152 (.021 p .006) seating plane 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 C 0.38 (.009 C .015) typ 0.1016 p 0.0508 (.004 p .002) 0.86 (.034) ref 0.65 (.0256) bsc 0 o C 6 o typ detail a detail a gauge plane 12 3 4 4.90 p 0.152 (.193 p .006) 8 7 6 5 3.00 p 0.102 (.118 p .004) (note 3) 3.00 p 0.102 (.118 p .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 p 0.127 (.035 p .005) recommended solder pad layout 0.42 p 0.038 (.0165 p .0015) typ 0.65 (.0256) bsc msop (ms) 0307 rev e 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 C?0.27 (.007 C .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 12 3 45 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8 9 10 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") ma x note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 0.254 (.010) 0 C 6 typ detail a detail a gauge plane 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 0.1016 0.0508 (.004 .002)
lt1815/lt1816/lt1817 19 181567fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) s package 14-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) 1 n 2 3 4 .150 ?.157 (3.810 ?3.988) note 3 14 13 .337 ?.344 (8.560 ?8.738) note 3 .228 ?.244 (5.791 ?6.197) 12 11 10 9 5 6 7 n/2 8 .016 ?.050 (0.406 ?1.270) .010 ?.020 (0.254 ?0.508) 45 0 ?8 typ .008 ?.010 (0.203 ?0.254) s14 0502 .053 ?.069 (1.346 ?1.752) .014 ?.019 (0.355 ?0.483) typ .004 ?.010 (0.101 ?0.254) .050 (1.270) bsc .245 min n 1 2 3 n/2 .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 C .244 (5.817 C 6.198) .150 C .157** (3.810 C 3.988) 16 15 14 13 .189 C .196* (4.801 C 4.978) 12 11 10 9 .016 C .050 (0.406 C 1.270) .015 p .004 (0.38 p 0.10) s 45 o 0 o C 8 o typ .007 C .0098 (0.178 C 0.249) .0532 C .0688 (1.35 C 1.75) .008 C .012 (0.203 C 0.305) typ .004 C .0098 (0.102 C 0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 C .165 .0250 bsc .0165 p .0015 .045 p .005 inches (millimeters) note: 1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale * dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side
lt1815/lt1816/lt1817 20 181567fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2001 lt 0909 rev b ? printed in usa related parts typical application part number description comments lt1363/lt1364/lt1365 single/dual/quad 70mhz, 1v/ns, c-load? op amps wide supply range: 2.5v to 15v lt1395/lt1396/lt1397 single/dual/quad 400mhz current feedback ampli? ers 4.6ma supply current, 800v/s, 80ma output current lt1806/lt1807 single/dual 325mhz, 140v/s rail-to-rail i/o op amps low noise: 3.5nv/ hz lt1809/lt1810 single/dual 180mhz, 350v/s rail-to-rail i/o op amps low distortion: 90dbc at 5mhz lt1812/lt1813/lt1814 single/dual/quad 3ma, 100mhz, 750v/s op amps low power: 3.6ma max at 5v c-load is a trademark of linear technology corporation. bandpass filter with independently settable gain, q and f c 455khz filter frequency response differential dsl receiver C + 1/4 lt1817 r g r q r r1 r g r c c r1 r f r f r v in gain = C + 1/4 lt1817 C + C + 1/4 lt1817 bandpass out 1/4 lt1817 181567 ta06a r1 r q q = 1 2 p r f c f c = frequency (hz) output magnitude (6db/div) 0 100k 1m 10m 181567 ta06b r = 499 r1 = 499 r f = 511 r q = 49.9 r g = 499 c = 680pf f c = 455khz q = 10 gain = 1 v s = 5v v in = 5v p-p distortion: 2nd < C76db 3rd < C90db across freq range noise: 60v over 1mhz bandwidth differential receive signal C + C + 181567 ta07 phone line + driver C driver 5v C5v 1/2 lt1816 1/2 lt1816 v + v C

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